Project Oberon Workstation on Digilent Nexys A7-100T

Post by **cfbsoftware** » Tue Dec 29, 2020 11:48 pm

To help new users get started we have now made available, free of charge, a disk image, Verilog sources and a bitstream file specifically to run the Project Oberon Workstation on the Digilent Nexys A7-100T FPGA trainer board 'out-of-the-box'.

This release is based on the Oberon sources (as at March 2020) and Verilog sources (as at September 2018) as described in An Update of the RISC5 Implementation, by Niklaus Wirth 15.6.2018.

The entire source code of the system, including the compiler, is included on the disk image. Go to https://www.astrobe.com/RISC5/Workstation.htm for more details and to request a copy of the system.