Astrobe Forum

captbill wrote: Will your soft processor fit on this chip?

ICE40UL1K-SWG16ITR50
LABc/CLBs 156
Logic elements 1248
Ram 57344
I/O 10

Unless you are capable of porting the Project Oberon Verilog code to different targets yourself you should only consider development boards which use FPGA devices which have already been demonstrated to support Project Oberon 2013 i.e. Xilinx's Spartan 3 and Spartan 6 devices.

What is RISC5 core clock frequency on Spartan-6 FPGA?

We are currently running it at the same clock frequency as the Spartan-3 i.e. 25 MHz.

Is there any "porting guide", which explains how to port it to a new/other FPGA board?

Cheers & thanks

All the information you should need to port the system to another FPGA board is on the Project Oberon website. In particular, chapters 16-7 of the Project Oberon book and the Verilog source code for the Digilent and OberonStation Spartan 3 boards.

The Verilog sources for Saanlima's Pippistrello Spartan 6 board are also available. Presumably you will have to know more about the particular device on the board you want to port it to if it uses an FPGA device which isn't part of the Xilinx Spartan 3 or Spartan 6 families.

cfbsoftware wrote:We are currently running it at the same clock frequency as the Spartan-3 i.e. 25 MHz.

The latest implementation of Embedded Project Oberon which targets sub-$100 FPGA development boards based on the Xilinx Artix-7 family of FPGA devices runs at 50 MHz.